Marvell Portfolio

The industry's broadest data infrastructure semiconductor portfolio

Marvell HDD Controllers and Preamplifiers
Marvell Portfolio
 

The Marvell Portfolio provides a full end-to-end solution for the AI infrastructure

Interconnects for every distance in the AI data center
 

One portfolio from copper to optical and, scale in to scale across

The Marvell interconnect portfolio encompasses optical and electrical transceivers, including PAM4 DSPs, coherent DSPs, and coherent optical modules — connecting AI infrastructure at every scale, from scale in to scale across. One portfolio spans copper and fiber, so operators no longer assemble their interconnect layer from multiple single-reach suppliers.

SCALE TIERSINTERCONNECT ROLE
Scale acrossDCI optical modules, coherent DSPs and coherent-lite DSPs are used to connect data centers across campus, metro, and long-haul distances.
Scale outPAM4 DSPs, coherent-lite DSPs, linear drivers, and TIAs enable the optical data center fabric that ties thousands of racks into an AI cluster, and clusters into a data center.
Scale upAEC DSPs, ACC linear equalizers, PCIe retimers, and multi-protocol retimers extend reach between accelerators inside the rack.
Data center switch silicon that scales the AI cloud
 

Network switches for scale-up, scale-out and scale-across networks

Data Center Switching is the Marvell family of Ethernet and PCIe switch silicon, led by the AI-purpose-built Teralynx® T100 switch, that switches the AI and cloud fabric at every layer. A monolithic, high-radix design removes the latency and power overhead of legacy multi-die switches, so operators deploy more accelerators within the same power envelope.

SCALE TIERDATA CENTER SWITCH ROLE
Scale acrossMarvell Teralynx T100 and Teralynx 10 switches carry traffic between sites over operators’ owned fiber.
Scale outTeralynx T100 and Teralynx 10 switches power AI backend scale-out networks. Marvell Teralynx 10 and Teralynx 7 switches are ideal for frontend AI and cloud scale-out networks.
Scale upTeralynx T100 and Marvell® Structera™ S PCIe switches enable the all-to-all scale-up fabric inside and near the rack.

Use cases

AI cluster fabric (scale out):

With up to 512-radix, the Teralynx T100 switch collapses network tiers in large AI training and inference clusters. It supports the latest Ultra Ethernet Consortium (UEC) requirements, without a hardware upgrade.
AI scale-up fabric (scale up):

With a programmable pipeline, Teralynx T100 switch silicon supports both Ethernet and emerging scale-up fabric protocols, including Ethernet Scale-Up Networking (ESUN).
Cloud-scale spine/leaf and data center interconnect (scale out and· scale across):

Teralynx 10 is deployed at scale across the largest cloud data centers, targeted at spine/leaf, AI cluster and data center interconnect applications.
Traditional cloud top-of-rack and spine/leaf (scale out):

The Teralynx 7 switch is deployed in fixed and modular switch systems for cloud-scale top-of-rack, end-of-rack and spine/leaf applications.
AI/HPC PCIe fanout (scale up):

Structera™ S 50256's 256 lanes of PCIe 5.0 connect multiple CPUs, GPUs, NICs and SSDs with low latency.
Switch, PHY, compute and security silicon for OEM systems customers trust
 

Gives networking, server, security and intelligent edge
OEMs the foundation for world-class performance

The Marvell networking and security portfolio spans enterprise and industrial Ethernet switches, copper and high-speed PHYs, multi-gigabit controllers, intelligent edge compute, and hardware security modules. These products are designed to meet the stringent requirements of networking, server, security and intelligent edge OEMs.

CATEGORYMARVELL PRODUCT ROLE
Access switchingEnterprise, branch, and SMB access switch silicon, from 10 Mbps to 10 Gbps.
Aggregation switchingCampus and enterprise aggregation switch silicon, up to 12.8 Tbps.
Industrial switchingRuggedized, TSN-capable switching for IT/OT convergence.
Copper and high-speed PHYsBASE-T PHY transceivers for access-layer devices, from 1 to 10 Gbps. Ethernet transceivers designed for high-speed line-card applications, from 25 GbE to 400 GbE.
Ethernet controllersPCIe-to-Ethernet controllers for servers, storage and CPE.
Edge compute and security connectivityIntelligent Edge/RAN compute and hardware security, including hardware security modules (HSM) used for HSM-as-a-service applications.

Use cases

Enterprise and industrial network modernization:

Marvell® Prestera® switch silicon powers campus, branch and industrial access and aggregation platforms, adding AIOps-ready telemetry and, in industrial settings, time-sensitive networking to converge IT and OT networks.
Multi-gigabit connectivity from access to line card:

Marvell® Alaska® PHYs and Ethernet controllers give networking and server OEMs copper connectivity from 10 Mbps up to 10 Gbps at the access layer, while Alaska high-speed line-card PHYs extend that to 400 Gbps for aggregation and service-provider equipment.
Intelligent Edge and RAN compute:

Marvell® OCTEON® DPUs embedded in distributed and centralized RAN units support open, virtualized RAN architectures and edge compute workloads, offloading processing-intensive workloads from general-purpose CPUs.
HSM-as-a-service:

Cloud operators can deploy Marvell® LiquidSecurity® HSMs to offer FIPS-certified, hardware-backed key management and cryptographic services to its customers.
Secure OEM systems:

Networking, server and security OEMs can integrate LiquidSecurity HSMs directly into their appliances and platforms, adding hardware-backed encryption, key management and post-quantum-ready crypto agility.
Memory and storage solutions to address the AI memory wall
 

Breaks memory free of the server and optimizes storage
from AI to enterprise

The Marvell memory and storage portfolio encompasses the Marvell® Structera™ CXL memory product line, built to break the AI memory wall, and a broad-market storage portfolio serving AI, cloud, enterprise and on-premises data centers. 

CATEGORYMARVELL PRODUCT ROLE
Near-memory accelerationStructera A near-memory accelerators place compute next to a dedicated memory pool inside the server, offloading memory-bound AI workloads from the host CPU.
Memory expansionStructera X memory-expansion controllers add DDR4 or DDR5 capacity and bandwidth to a single server over CXL.
Memory poolingStructera S CXL switches dynamically share memory across CPUs, GPUs and XPUs across the rack.
KV-cache and flash storage offloadMarvell® Bravera™ SSD controllers move cooler KV-cache and working-set data from memory to flash as inference caches outgrow DRAM.
Broad-market storage networkingMarvell® QLogic® Fibre Channel adapters and controllers, HDD controllers and preamplifiers, and storage accelerators connect and manage storage across AI, cloud, enterprise and on-premises data centers.

Use cases

AI inference memory expansion:

Structera X memory-expansion controllers add DDR4 or DDR5 capacity and bandwidth per server, directly expanding KV-cache headroom and improving time-to-first-token for large language model inference.
AI memory pooling and rack-scale disaggregation:

Structera S CXL switches pool memory across the rack, dynamically sharing capacity among CPUs, GPUs and XPUs to improve utilization, inference throughput and total cost of ownership without replacing existing platforms.
Near-memory AI acceleration:

Structera A near-memory accelerators offload memory-bound tasks, vector search, deep-learning recommendation models and in-memory databases from the host CPU, reducing data movement and freeing host cores for other work.
AI inference KV-cache storage tiering:

Bravera SSD controller silicon moves cooler KV-cache and working-set data from high-bandwidth memory to flash as caches outgrow available DRAM, keeping inference workloads running efficiently.
Enterprise and cloud storage networking:

QLogic Fibre Channel adapters and controllers, HDD controllers and preamplifiers, and storage accelerators connect and manage storage area networks and mass storage across AI, cloud, enterprise and on-premises data centers.
Custom silicon that turns hyperscaler workloads into production platforms.

 

Turns power and capital into more usable AI capacity,
one architecture at a time

The Marvell custom portfolio spans Marvell silicon and IP used as the foundation for co-designed products that address a single hyperscaler's workload and infrastructure strategy. Custom co-designed products include AI accelerators, memory, scale-up fabrics, security and co-processors, built from a shared foundation of SerDes, die-to-die interconnect, custom HBM, custom SRAM and advanced packaging, carried from architecture through volume production.

TIERCUSTOM IP AND PRODUCT ROLE
On-dieCustom SRAM tuned to the workload, next to compute logic.
Scale inDies and chiplets connected in a single package through die-to-die interconnect and advanced packaging. 
Scale up (in-rack)224G SerDes, scale-up switch silicon, and co-packaged copper unifying accelerators into one compute domain.
Scale up multi-rackNear-package and co-packaged optics extending the scale-up domain beyond a single rack.
Companion siliconHost control processors, storage controllers and video processors built as custom companions to the main compute engine.
All tiersRoot of Trust, key management and cryptographic acceleration, dedicated or integrated into another custom device.

Use cases

Workload-optimized AI acceleration:

A hyperscaler co-designs a custom XPU with Marvell, combining its own compute IP with Marvell die-to-die, custom HBM, dense SRAM and advanced packaging to maximize performance per watt and usable memory per socket.
Memory hierarchy tuned to the workload:

Custom SRAM, custom HBM and CXL-based memory expansion or pooling are shaped around a specific model size, KV-cache and bandwidth profile rather than adapting the workload to a fixed memory subsystem.
Scale-up fabrics that unify accelerator domains:

A custom scale-up fabric, combining switch silicon, SerDes, copper and optical connectivity, lets dozens to hundreds of accelerators operate as one compute domain within a server, rack or multi-rack scale-up domain.
Security designed into the architecture:

Root of Trust, key management and cryptographic acceleration are integrated directly into custom compute, networking, memory or storage silicon rather than added afterward.
Purpose-built companion processing:

A host control processor, storage controller or video processor is built as a custom companion device around a specific system role within a hyperscaler's architecture.

Contact Us

We believe better partnerships help to build better technologies. Let’s connect and see what we can design together!

Thank You for Your Interest

We will be in touch with you soon!