数据处理单元
Empowering carrier, enterprise and cloud data services
Data Processing Units
Built on five generations of the industry’s most scalable and widely adopted data processing, Marvell’s OCTEON® and ARMADA® devices are optimized for wireless infrastructure, carrier, enterprise and cloud data services.
Empowering carrier, enterprise and cloud data services
Data Processing Units
Marvell’s OCTEON and ARMADA devices are designed for use in wireless infrastructure and networking equipment including switches, routers, secure gateways, firewall, network monitoring, and smartNICs.
OCTEON 10 DPU
Marvell’s OCTEON 10 DPU family is designed to service challenging hyperscale cloud workloads, 5G wireless transport, carrier & enterprise data center applications and fanless networking edge boxes.
- Industry’s first 5nm DPU that incorporates Arm Neoverse N2 cores delivering 3X the compute performance and 50 percent lower power over previous generations of OCTEON
- Innovative hardware accelerators for inline ML/AI deliver 100x performance gains over software processing
- VPP based hardware accelerator improve the packet processing rate by over 5x
- Integrated 1 Terabit switch, true inline crypto and highly programmable packet processing
- Datapath support exceeding 400G.
- The DPU enables high speed connectivity with advanced interfaces including DDR5, PCIe 5.0, and highly optimized silicon proven 56G SerDes
OCTEON 10 CN103, CN106, CN106S, and DPU 400
The OCTEON 10 DPU family is focused on power sensitive edge applications including 5G transport, SDWAN, smartNICs, and edge routers.
OCTEON TX2 DPUs
Marvell’s OCTEON TX2 is 64-bit ARM SoC processors that combine up to 36 cores with configurable and programmable hardware accelerator blocks that support up to 200 GB data paths.
- Up to 36 custom designed 64-bit Armv8 cores ranging up to 2.4 GHz frequency
- Enhanced NITROX® V security co-processors with DPI capability which accelerate a comprehensive set of asymmetric and symmetric cryptographic operations
- Up to 5 x 100G integrated MACs, up to 56 x 25G SerDes, and DDR4 3200MTS support
- Rich I/O interfaces supporting PCIe 4.0 root-complex and end point configurations thereby enabling full SOC virtualization
- Innovative load-balancing and work scheduling hardware for QoS, packet ordering and synchronization
OCTEON TX2 CN9130
A 4 core Arm Cortex-A72 DPUs with up to 2.2 GHz frequency. It supports up to 18 lanes high-speed SerDes interfaces, PCIe 3.0 with up to 14 lanes and acceleration engines for networking, public key, security and time stamping.
OCTEON TX2 CN92XX, CN96xx, CN98xx
DPUs with 12-36 64-bit Arm v8 cores at 2.4 GHz per core. The family incorporates NITROX® V security accelerator, DPI engine, compression, QoS and PCIe 4.0. It also supports hardware virtualization, and up to 56 lanes of SerDes.
OCTEON MIPS64 Multi-Core DPUs
The Marvell OCTEON family of MIPS64 data processing units, is the only DPU family that utilizes custom designed 64-bit cnMIPS cores and scales up to 48 cores. It incorporates networking I/Os along with the most advanced security, storage, and application hardware acceleration, offering unprecedented throughput and programmability.
- Enhanced security processors with DPI capability which accelerate a comprehensive set of asymmetric and symmetric cryptographic operations
- Rich I/O interfaces supporting root-complex and end point configurations on PCIe 3.0
- 创新和独特的负载平衡和消息调度硬件，可解决服务质量、数据包排序和同步的问题
- Common SDK and full networking data plane, control and management plane stack support across the entire family
OCTEON III CN7XXX
CN7XXX scales up to 48 64-bit cnMIPS64 III cores at 1.8 GHz. The family supports standard SerDes I/O with multiple ports of PCIe 3.0, SATA 6G and hardware acceleration engines for 100 Gbps data processing.
OCTEON TX2 LiquidIO III SmartNIC
Marvell’s LiquidIO III is an OCTEON-based DPU for inline network and security acceleration card in a SmartNIC PCI form factor. It includes support for a full networking software stack based on Linux and DPDK. The LiquidIO III architecture can scale on the hardware as well as software capabilities using the latest generation of OCTEON data processing units. Marvell’s third generation 100GbE adapter family enables data centers to rapidly deploy high-performance SDN applications for both installed and new infrastructure optimizing server utilization, response times and network agility. This product in a PCI Express form factor, provides a proven, high-performance programmable adapter platform that enables cloud service providers to offload and accelerate infrastructure workloads in the data center.
- Highest (24) ARM processor core count SmartNIC on the market.
- Full featured DPDK networking and security suite with Control, Management and Data plane modules
LIquidIO III
Marvell’s LiquidIO III is an OCTEON-based DPU for inline network and security acceleration card in a SmartNIC PCI form factor. It includes support for a full networking software stack based on Linux and DPDK.
SmartNIC SDK
Marvell’s OCTEON DPUs are supported by a common SDK with user plane extensions and hooks for kernel level enhancements.
OCTEON Fusion Baseband DPUs
Providing low latency, high system capacity and high per-user data rates – all necessary requirements for a 5G network – requires both the densification of the radio access network (RAN) and the deployment of additional network nodes. As 5G radio networks increasingly use wider bandwidths, the demand for high throughput micro cells with full macro cell capabilities has increased dramatically. Marvell’s OCTEON Fusion DPUs are targeted for multi-sector macro cell base stations, micro cell base stations, intelligent radio heads and O-RAN-defined distributed units (DUs).
- Support for both 5G NR and LTE-A (FDD/TDD) operation.
- Highly configurable wireless baseband architecture offers flexible cell/sector/bandwidth combinations as required for different operator deployment scenarios.
- Support for all 3GPP-defined operating frequencies – from sub-7GHz to mmWave.
- Multiple OCTEON Fusion DPUs may be combined to offer additional base station capacity and features such as coordinated multi-point access (COMP).
OCTEON Fusion CNF95XX
CNF95XX family of DPUs provide 5G and LTE-A PHY layer (L1) functionality, supporting base station designs ranging from high capacity micro cells to multi-sector macro cells. CNF95XX also support O-RAN distributed units.
OCTEON Fusion CNF75XX
The CNF75XX family of baseband data processing units provide full L1-L7 capabilities for 3G and 4G base station designs. These base stations can range from high capacity micro cells to multi sector macro cells.
OCTEON Fusion CNF73XX
The OCTEON Fusion CNF73XX family of baseband data processing units provide full L1-L7 capabilities for 3G and 4G micro cell base station designs supporting up to 500 simultaneous users across 1 to 4 20MHz sectors.
Open RAN & Virtualized RAN Platform Solutions
Marvell’s O-RAN platform brings established, leading edge baseband, DPU and connectivity technology to open RAN and vRAN markets. Marvell’s OCTEON Fusion® baseband processors, OCTEON DPUs and Prestera switches have enabled leading telecom OEMs to deploy 5G and LTE networks worldwide. This technology is now available to O-RAN operators, OEMs and system integrators.
The O-RAN Platform provides a purpose-built, cloud native, highly programmable solution to address capacity, power, cost and time-to-market challenges of open RAN architectures. Leveraging carrier-proven silicon and comprehensive reference software, the O-RAN platform provides solutions for massive MIMO Radio Units (RU) and for integrated and virtualized Distributed Units (DU/vDU).
OCTEON DPUs provide leading performance in transport, security and RAN L2/L3 applications, which are critical for DU and Centralized Unit (CU) applications. Acceleration of specialized packets and data processing applications address the ever-increasing throughput and latency requirements of 5G virtualized networks.
The Prestera 7K switch family connects and aggregates large pipelines and assures stable and reliable connectivity without sacrificing visibility in the network, offering best-in-class telemetry, scalability, performance, power, and cost.
- Spans all 5G RAN elements: RU, DU, CU and connectivity
- Consists of silicon, software and hardware reference designs
- Achieves significant OPEX and CAPEX savings
- Supports the most stringent 5G and LTE latency requirements
- Delivers best in class scalability, performance, power and cost
- Provides a highly programmable solution
- Supports massive MIMO RU deployments
OCTEON Fusion-O RU
3GPP 5G/4G lower L1 and beamforming silicon for 32T32R, 100MHz channelization radio units. Features up to 100Gbps of fronthaul capacity, 16 lanes of JESD204B/C, multiple programmable accelerators and signal processing units. Integrated with ADI’s 5G transceiver product line.
OCTEON Fusion-O DU
3GPP 5G/4G L1 silicon capable of processing up to 16 DL and 8 UL MIMO layers at 100MHz channelization. Features up to 150Gbps of fronthaul and 100Gbps of midhaul RoE/eCPRI capacity, 15Gbps of OTA traffic, multiple programmable accelerators and signal processing units.
OCTEON Family
DPUs with 12-36 64-bit Arm v8 cores at 2.4 GHz per core. The family incorporates NITROX® V security accelerator, DPI engine, compression, QoS and PCIe 4.0. Supports hardware virtualization, and up to 56 lanes of SerDes.
Prestera® DX 7300 series
Family of switches optimized for Carrier Ethernet Access and Edge. Incorporates Class C PTP/SyncE, advanced security, and enhanced network telemetry and intelligence for actionable analytics. Supports flexible I/O speeds from 1G to 400G.
ARMADA DPUs
Marvell ARMADA data processing units are custom designed to deliver optimal performance, low power, and high levels of integration. Our ARMv8 standard CPU cores are the most advanced implementations of industry standard ARM architecture, delivering exceptional processing performance. The ARMADA DPU family is optimized for cost optimized applications in compute, networking and storage platforms.
- Up to 4 Cortex A72, 64-bit ARMv8 cores ranging up to 1.4 GHz frequency.
- Advanced security co-processor which accelerates a comprehensive set of asymmetric and symmetric cryptographic operations.
- Rich I/O interfaces supporting root-complex and end point configurations on PCIe 3.0.
- Networking engine which accounts for hardware parsing, classification, policing and QoS.
- Common SDK and full networking data plane, control and management plane stack support across the entire family.
ARMADA 7040
ARMADA 7040 includes quad-core ARM Cortex-A72 64-bit processor with up to 1.4 GHz CPU clock speed. The processor supports up to 6 SerDes lanes, PCIe 3.0 and acceleration engines for storage, networking and security.
软件
Marvell provides a Unified Software Development Kit (SDK) for all OCTEON and ARMADA families. The Data Processing Unit family device capabilities are enhanced by open source packet and security application acceleration APIs. Marvell® also offers an industry standard control, management and data plane software stack optimized for the latest generation of ARM based OCTEON processors.
- Market applications that are supported include routing and SD-WAN, network security and threat detection, MEC and edge compute, network disaggregation.
- Support for DPDK poll mode and event mode drivers.
- VPP and ODP support on top of DPDK.
- Kernel hooks provided for XDP and eBPF.
- SDK support for tight integration with Marvell® Switch API and NIC device driver software.
Unified Software Development Kit
DPU SDK provides complete software platform for development on OCTEON and ARMADA processors. Base SDK is available with generic, and customer-specific extensions such as DPDK, VPP, and ODP.
OCTEON TX2 DPDK Overview
OCTEON TX2 DPDK software package ensures the successful implementation of Marvell’s advanced packet-processing and hardware accelerators.
OCTEON TX2 DPDK
Getting Started
Read more for an overview of how to install and configure the DPDK software on the OCTEON TX2.
合作伙伴
Marvell has developed a rich ecosystem of hardware system level and software partners who are able to showcase OCTEON & ARMADA capabilities across multiple verticals.
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