Data Processing Units
Built on seven generations of the industry’s first, most scalable and widely adopted data infrastructure processors, Marvell’s OCTEON™, OCTEON™ Fusion and ARMADA® platforms are optimized for wireless infrastructure, wireline carrier networks, enterprise and cloud data centers.
Empowering carrier, enterprise and cloud data services
Data Processing Units (DPUs)
Marvell’s OCTEON and ARMADA devices are design for use in wireless infrastructure and networking equipment including switches, routers, secure gateways, firewall, network monitoring, and SmartNICs (Smart Network Interface Cards) and are supported with comprehensive and unified software development kits (SDKs) and open source APIs for a wide range of networking, security and compute market applications.
- OCTEON 10 DPU
- OCTEON TX2 DPUs
- OCTEON MIPS64 Multi-Core DPUs
- OCTEON TX2 LiquidIO III SmartNIC
- OCTEON Fusion 基带处理器
- No-Compromise 5G Open RAN Architecture
- ARMADA DPUs
- 软件
OCTEON 10 DPU
Marvell’s OCTEON 10 DPU family is optimized for challenging hyperscale cloud workloads, 5G wireless transport, 5G RAN intelligent controller (RIC) & edge inferencing, carrier & enterprise data center applications and fanless networking edge boxes.
- Industry’s first 5nm DPU that incorporates Arm Neoverse N2 cores delivering 3X the compute performance and 50 percent lower power over previous generations of OCTEON
- Innovative hardware accelerators for inline ML/AI deliver 100x performance gains over software-based inferencing
- VPP based hardware accelerator improve the packet processing rate by over 5x
- Integrated 1 Terabit switch, true inline crypto and highly programmable packet processing
- Datapath support exceeding 400G
- The DPU enables high speed connectivity with advanced interfaces including DDR5, PCIe 5.0, and highly optimized silicon proven 56G SerDes
OCTEON TX2 DPUs
Marvell’s OCTEON TX2 is 64-bit ARM SoC processors that combine up to 36 cores with configurable and programmable hardware accelerator blocks that support up to 200G data paths.
- Up to 36 custom designed 64-bit Armv8 cores ranging up to 2.4 GHz frequency
- Enhanced NITROX® V security co-processors with DPI capability which accelerate a comprehensive set of asymmetric and symmetric cryptographic operations
- Up to 5 x 100G integrated MACs, up to 56 x 25G SerDes, and DDR4 3200MTS support
- Rich I/O interfaces supporting PCIe 4.0 root-complex and end point configurations thereby enabling full SOC virtualization
- Innovative load-balancing and work scheduling hardware for QoS, packet ordering and synchronization
OCTEON MIPS64 Multi-Core DPUs
- Enhanced security processors with DPI capability which accelerate a comprehensive set of asymmetric and symmetric cryptographic operations
- Rich I/O interfaces supporting root-complex and end point configurations on PCIe 3.0
- 创新和独特的负载平衡和消息调度硬件，可解决服务质量、数据包排序和同步的问题
- Common SDK and full networking data plane, control and management plane stack support across the entire family
OCTEON TX2 LiquidIO III SmartNIC
- Highest (24) ARM processor core count SmartNIC on the market
- Full featured DPDK networking and security suite with Control, Management and Data plane modules
OCTEON Fusion 基带处理器
- Consists of silicon, software and hardware reference designs
- Supports 5G NR and LTE-A (FDD/TDD) operation and all 3GPP-defined operating frequencies – from sub-6GHz to mmWave
- Integrates comprehensive, in-line 5G Layer hardware accelerators for no-compromise performance in dedicated, O-RAN and vRAN architectures
- Highly configurable wireless baseband architecture offers flexible cell/sector/bandwidth combinations as required for different operator deployment scenarios
- Supports massive MIMO RU deployments
- Multiple OCTEON Fusion processors may be combined to offer additional base station capacity and features such as coordinated multi-point access (CoMP)
OCTEON Fusion CNF73XX
The OCTEON Fusion CNF73XX family of baseband data processing units provide full L1-L7 capabilities for 3G and 4G micro cell base station designs supporting up to 500 simultaneous users across 1 to 4 20MHz sectors.
No-Compromise 5G Open RAN Architecture
- Supports open, scalable best-in-class 5G performance, power and cost
- Interface to any Arm- or x86-based host server via standard PCIe slot
- Cloud-optimized in-line 5G acceleration and containerized offload via VFs
- Full O-RAN compliance with AAL support and O1/O2 interfaces
- Open-source development tools, including DPDK, and open APIs
- Collaborative designs with RAN and cloud hardware and software partners
OCTEON Fusion-O RU
OCTEON Fusion-O DU
OCTEON DPU Family
ARMADA DPUs
- Up to 4 Cortex A72, 64-bit ARMv8 cores ranging up to 1.4 GHz frequency
- Advanced security co-processor which accelerates a comprehensive set of asymmetric and symmetric cryptographic operations
- Rich I/O interfaces supporting root-complex and end point configurations on PCIe 3.0
- Networking engine which accounts for hardware parsing, classification, policing and QoS
- Common SDK and full networking data plane, control and management plane stack support across the entire family
软件
- Market applications that are supported include routing and SD-WAN, network security and threat detection, MEC and edge compute, network disaggregation
- Support for DPDK poll mode and event mode drivers
- VPP and ODP support on top of DPDK
- Kernel hooks provided for XDP and eBPF
- SDK support for tight integration with Marvell® Switch API and NIC device driver software
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